Wave Pipelining:

This project aims at developing new design methodology that eliminates the effects of crosstalk and other noise sources in wave-pipelined systems. Wave pipelining is a design method that uses gate capacitance to hold information between successive stages, thus allowing multiples sets of data to coexist, increasing the throughput. We address a source of delay variation that is common in deep sub-micron designs, namely noise due to crosstalk. The design methodology developed will provide structural (circuit level) and also physical (layout level) solutions that will help take full advantage of the performance enhancement of wave-pipelining systems. Specifically, the research focuses on investigating the effects of crosstalk on wave-pipelined timing and the level of its degradation. We propose circuit modifications that would be tolerant of any such noise. This will also compensate for most of the environmental delay variations. Also, we plan to develop basic cells and design arithmetic circuits with focus on DSP Applications. We also plan to develop various building blocks of a DSP and test a simple integrated DSP solution for Wireless Applications.